let P be Instruction-Sequence of SCMPDS; :: thesis: for s being State of SCMPDS
for I being Program of SCMPDS
for a being Int_position
for i being Integer st s . (DataLoc ((s . a),i)) <= 0 holds
( while>0 (a,i,I) is_closed_on s,P & while>0 (a,i,I) is_halting_on s,P )
let s be State of SCMPDS; :: thesis: for I being Program of SCMPDS
for a being Int_position
for i being Integer st s . (DataLoc ((s . a),i)) <= 0 holds
( while>0 (a,i,I) is_closed_on s,P & while>0 (a,i,I) is_halting_on s,P )
let I be Program of SCMPDS; :: thesis: for a being Int_position
for i being Integer st s . (DataLoc ((s . a),i)) <= 0 holds
( while>0 (a,i,I) is_closed_on s,P & while>0 (a,i,I) is_halting_on s,P )
let a be Int_position; :: thesis: for i being Integer st s . (DataLoc ((s . a),i)) <= 0 holds
( while>0 (a,i,I) is_closed_on s,P & while>0 (a,i,I) is_halting_on s,P )
let i be Integer; :: thesis: ( s . (DataLoc ((s . a),i)) <= 0 implies ( while>0 (a,i,I) is_closed_on s,P & while>0 (a,i,I) is_halting_on s,P ) )
set d1 = DataLoc ((s . a),i);
assume A1: s . (DataLoc ((s . a),i)) <= 0 ; :: thesis: ( while>0 (a,i,I) is_closed_on s,P & while>0 (a,i,I) is_halting_on s,P )
set i1 = (a,i) <=0_goto ((card I) + 2);
set i2 = goto (- ((card I) + 1));
set WHL = while>0 (a,i,I);
set pWHL = stop (while>0 (a,i,I));
set s3 = Initialize s;
set P3 = P +* (stop (while>0 (a,i,I)));
set s4 = Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),1);
set P4 = P +* (stop (while>0 (a,i,I)));
A2: IC (Initialize s) = 0 by MEMSTR_0:def 11;
A3: not DataLoc ((s . a),i) in dom (Start-At (0,SCMPDS)) by SCMPDS_4:18;
not a in dom (Start-At (0,SCMPDS)) by SCMPDS_4:18;
then A4: (Initialize s) . (DataLoc (((Initialize s) . a),i)) = (Initialize s) . (DataLoc ((s . a),i)) by FUNCT_4:11
.= s . (DataLoc ((s . a),i)) by A3, FUNCT_4:11 ;
A5: while>0 (a,i,I) = ((a,i) <=0_goto ((card I) + 2)) ';' (I ';' (goto (- ((card I) + 1)))) by SCMPDS_4:15;
Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),(0 + 1)) = Following ((P +* (stop (while>0 (a,i,I)))),(Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),0))) by EXTPRO_1:3
.= Following ((P +* (stop (while>0 (a,i,I)))),(Initialize s))
.= Exec (((a,i) <=0_goto ((card I) + 2)),(Initialize s)) by A5, SCMPDS_6:11 ;
then A6: IC (Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),1)) = ICplusConst ((Initialize s),((card I) + 2)) by A1, A4, SCMPDS_2:56
.= 0 + ((card I) + 2) by A2, SCMPDS_6:12 ;
A7: card (while>0 (a,i,I)) = (card I) + 2 by Th15;
then A8: (card I) + 2 in dom (stop (while>0 (a,i,I))) by COMPOS_1:64;
stop (while>0 (a,i,I)) c= P +* (stop (while>0 (a,i,I))) by FUNCT_4:25;
then (P +* (stop (while>0 (a,i,I)))) . ((card I) + 2) = (stop (while>0 (a,i,I))) . ((card I) + 2) by A8, GRFUNC_1:2
.= halt SCMPDS by A7, COMPOS_1:64 ;
then A9: CurInstr ((P +* (stop (while>0 (a,i,I)))),(Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),1))) = halt SCMPDS by A6, PBOOLE:143;

now :: thesis: for k being Nat holds IC (Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),k)) in dom (stop (while>0 (a,i,I)))

let k be Nat; :: thesis: IC (Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),b₁)) in dom (stop (while>0 (a,i,I)))

per cases ( 0 < k or k = 0 ) ;

suppose 0 < k ; :: thesis: IC (Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),b₁)) in dom (stop (while>0 (a,i,I)))

then 1 + 0 <= k by INT_1:7;
hence IC (Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),k)) in dom (stop (while>0 (a,i,I))) by A8, A6, A9, EXTPRO_1:5; :: thesis: verum

end;

suppose k = 0 ; :: thesis: IC (Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),b₁)) in dom (stop (while>0 (a,i,I)))

then Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),k) = Initialize s ;
hence IC (Comput ((P +* (stop (while>0 (a,i,I)))),(Initialize s),k)) in dom (stop (while>0 (a,i,I))) by A2, COMPOS_1:36; :: thesis: verum

end;

end;

end;

hence while>0 (a,i,I) is_closed_on s,P by SCMPDS_6:def 2; :: thesis: while>0 (a,i,I) is_halting_on s,P
P +* (stop (while>0 (a,i,I))) halts_on Initialize s by A9, EXTPRO_1:29;
hence while>0 (a,i,I) is_halting_on s,P by SCMPDS_6:def 3; :: thesis: verum