let ap, bp, cp, dp be non pair set ; :: thesis: for cin being set
for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin))
for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin holds
( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 )
let cin be set ; :: thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin))
for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin holds
( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 )
set S = BitFTA0Str (ap,bp,cp,dp,cin);
set C = BitFTA0Circ (ap,bp,cp,dp,cin);
set A1 = GFA0AdderOutput (ap,bp,cp);
set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2];
set cindp = [<*cin,dp*>,and2];
set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2];
let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); :: thesis: for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin holds
( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 )
let a123, a4, a5 be Element of BOOLEAN ; :: thesis: ( a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin implies ( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 ) )
assume that
A1: a123 = s . (GFA0AdderOutput (ap,bp,cp)) and
A2: a4 = s . dp and
A3: a5 = s . cin ; :: thesis: ( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 )
A4: dom s = the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by CIRCUIT1:3;
A5: cin in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th4;
A6: GFA0AdderOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th4;
A7: InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by FACIRC_1:37;
then [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5;
hence (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = and2 . (s * <*(GFA0AdderOutput (ap,bp,cp)),cin*>) by FACIRC_1:35
.= and2 . <*a123,a5*> by A1, A3, A6, A5, A4, FINSEQ_2:125
.= a123 '&' a5 by FACIRC_1:def 6 ;
:: thesis: ( (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 )
A8: dp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th4;
[<*cin,dp*>,and2] in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by A7, Th5;
hence (Following s) . [<*cin,dp*>,and2] = and2 . (s * <*cin,dp*>) by FACIRC_1:35
.= and2 . <*a5,a4*> by A2, A3, A8, A5, A4, FINSEQ_2:125
.= a5 '&' a4 by FACIRC_1:def 6 ;
:: thesis: (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123
[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by A7, Th5;
hence (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = and2 . (s * <*dp,(GFA0AdderOutput (ap,bp,cp))*>) by FACIRC_1:35
.= and2 . <*a4,a123*> by A1, A2, A6, A8, A4, FINSEQ_2:125
.= a4 '&' a123 by FACIRC_1:def 6 ;
:: thesis: verum