set S0 = 1GateCircStr (<*>,((0 -tuples_on BOOLEAN) --> TRUE));
set A0 = 1GateCircuit (<*>,((0 -tuples_on BOOLEAN) --> TRUE));
set Sn = n -BitSubtracterStr (x,y);
set o0 = [<*>,((0 -tuples_on BOOLEAN) --> TRUE)];
deffunc H₁( set , Nat) -> Element of InnerVertices (BorrowStr ((x . ($2 + 1)),(y . ($2 + 1)),$1)) = BorrowOutput ((x . ($2 + 1)),(y . ($2 + 1)),$1);
deffunc H₂( non empty ManySortedSign , set , Nat) -> ManySortedSign = $1 +* (BitSubtracterWithBorrowStr ((x . ($3 + 1)),(y . ($3 + 1)),$2));
deffunc H₃( non empty ManySortedSign , non-empty MSAlgebra over $1, set , Nat) -> MSAlgebra over $1 +* (BitSubtracterWithBorrowStr ((x . ($4 + 1)),(y . ($4 + 1)),$3)) = $2 +* (BitSubtracterWithBorrowCirc ((x . ($4 + 1)),(y . ($4 + 1)),$3));
A1: for S being non empty ManySortedSign
for A being non-empty MSAlgebra over S
for z being set
for n being Nat holds H₃(S,A,z,n) is non-empty MSAlgebra over H₂(S,z,n) ;
thus for A1, A2 being strict gate`2=den Boolean Circuit of n -BitSubtracterStr (x,y) st ex f, g, h being ManySortedSet of NAT st
( n -BitSubtracterStr (x,y) = f . n & A1 = g . n & f . 0 = 1GateCircStr (<*>,((0 -tuples_on BOOLEAN) --> TRUE)) & g . 0 = 1GateCircuit (<*>,((0 -tuples_on BOOLEAN) --> TRUE)) & h . 0 = [<*>,((0 -tuples_on BOOLEAN) --> TRUE)] & ( for n being Nat
for S being non empty ManySortedSign
for A being non-empty MSAlgebra over S
for x being set st S = f . n & A = g . n & x = h . n holds
( f . (n + 1) = H₂(S,x,n) & g . (n + 1) = H₃(S,A,x,n) & h . (n + 1) = H₁(x,n) ) ) ) & ex f, g, h being ManySortedSet of NAT st
( n -BitSubtracterStr (x,y) = f . n & A2 = g . n & f . 0 = 1GateCircStr (<*>,((0 -tuples_on BOOLEAN) --> TRUE)) & g . 0 = 1GateCircuit (<*>,((0 -tuples_on BOOLEAN) --> TRUE)) & h . 0 = [<*>,((0 -tuples_on BOOLEAN) --> TRUE)] & ( for n being Nat
for S being non empty ManySortedSign
for A being non-empty MSAlgebra over S
for x being set st S = f . n & A = g . n & x = h . n holds
( f . (n + 1) = H₂(S,x,n) & g . (n + 1) = H₃(S,A,x,n) & h . (n + 1) = H₁(x,n) ) ) ) holds
A1 = A2 from CIRCCMB2:sch 21(A1); :: thesis: verum