let V be RealLinearSpace; for u, u1, v, v1, w, x, y being VECTOR of V st Gen x,y & u,v,u1,v1 are_COrtm_wrt x,y & u,v,v1,w are_COrtm_wrt x,y holds
u,v,u1,w are_COrtm_wrt x,y
let u, u1, v, v1, w, x, y be VECTOR of V; ( Gen x,y & u,v,u1,v1 are_COrtm_wrt x,y & u,v,v1,w are_COrtm_wrt x,y implies u,v,u1,w are_COrtm_wrt x,y )
assume A1:
Gen x,y
; ( not u,v,u1,v1 are_COrtm_wrt x,y or not u,v,v1,w are_COrtm_wrt x,y or u,v,u1,w are_COrtm_wrt x,y )
assume that
A2:
u,v,u1,v1 are_COrtm_wrt x,y
and
A3:
u,v,v1,w are_COrtm_wrt x,y
; u,v,u1,w are_COrtm_wrt x,y
A4:
Ortm (x,y,u), Ortm (x,y,v) // u1,v1
by A2;
A5:
Ortm (x,y,u), Ortm (x,y,v) // v1,w
by A3;
A6:
u1,v1 // Ortm (x,y,u), Ortm (x,y,v)
by A4, ANALOAF:12;
A7:
now ( u <> v implies u,v,u1,w are_COrtm_wrt x,y )assume
u <> v
;
u,v,u1,w are_COrtm_wrt x,ythen
u1,
v1 // v1,
w
by A1, A4, A5, Th6, ANALOAF:11;
then A8:
u1,
v1 // u1,
w
by ANALOAF:13;
(
u1 <> v1 implies
u,
v,
u1,
w are_COrtm_wrt x,
y )
by A6, A8, ANALOAF:11;
hence
u,
v,
u1,
w are_COrtm_wrt x,
y
by A3;
verum end;
( u = v implies u,v,u1,w are_COrtm_wrt x,y )
by ANALOAF:9;
hence
u,v,u1,w are_COrtm_wrt x,y
by A7; verum