let I be InitHalting good Program of SCM+FSA; :: thesis: for a being read-write Int-Location st ( for s being State of SCM+FSA
for P being Instruction-Sequence of SCM+FSA st s . a > 0 holds
(IExec (I,P,s)) . a < s . a ) holds
while>0 (a,I) is InitHalting
let a be read-write Int-Location; :: thesis: ( ( for s being State of SCM+FSA
for P being Instruction-Sequence of SCM+FSA st s . a > 0 holds
(IExec (I,P,s)) . a < s . a ) implies while>0 (a,I) is InitHalting )
set D = Data-Locations ;
defpred S₁[ Element of NAT ] means for t being State of SCM+FSA
for Q being Instruction-Sequence of SCM+FSA st t . a <= $1 holds
while>0 (a,I) is_halting_onInit t,Q;
assume A1: for s being State of SCM+FSA
for P being Instruction-Sequence of SCM+FSA st s . a > 0 holds
(IExec (I,P,s)) . a < s . a ; :: thesis: while>0 (a,I) is InitHalting

A2: now :: thesis: for k being Element of NAT st S₁[k] holds
S₁[k + 1]

let k be Element of NAT ; :: thesis: ( S₁[k] implies S₁[k + 1] )
assume A3: S₁[k] ; :: thesis: S₁[k + 1]

now :: thesis: for t being State of SCM+FSA
for Q being Instruction-Sequence of SCM+FSA st t . a <= k + 1 holds
while>0 (a,I) is_halting_onInit t,Q

let t be State of SCM+FSA; :: thesis: for Q being Instruction-Sequence of SCM+FSA st t . a <= k + 1 holds
while>0 (a,I) is_halting_onInit b₂,b₃
let Q be Instruction-Sequence of SCM+FSA; :: thesis: ( t . a <= k + 1 implies while>0 (a,I) is_halting_onInit b₁,b₂ )
assume A4: t . a <= k + 1 ; :: thesis: while>0 (a,I) is_halting_onInit b₁,b₂

per cases ( t . a <> k + 1 or t . a = k + 1 ) ;

suppose t . a <> k + 1 ; :: thesis: while>0 (a,I) is_halting_onInit b₁,b₂

then t . a < k + 1 by A4, XXREAL_0:1;
hence while>0 (a,I) is_halting_onInit t,Q by A3, INT_1:7; :: thesis: verum

end;

suppose A5: t . a = k + 1 ; :: thesis: while>0 (a,I) is_halting_onInit b₁,b₂

set l0 = intloc 0;
set tW0 = Initialized t;
set QW = Q +* (while>0 (a,I));
set t1 = Initialized t;
set Q1 = Q +* I;
set Wt = Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3));
set A = NAT ;
set It = Comput ((Q +* I),(Initialized t),(LifeSpan ((Q +* I),(Initialized t))));
A6: I is_halting_onInit t,Q by SCM_HALT:26;
then Q +* I halts_on Initialized t by SCM_HALT:def 5;
then A7: Q +* I halts_on Initialized t ;
A8: I is_closed_onInit t,Q by SCM_HALT:25;
then A9: DataPart (Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))) = DataPart (Comput ((Q +* I),(Initialized t),(LifeSpan ((Q +* I),(Initialized t))))) by A5, A6, Th13;
then A10: (Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))) . (intloc 0) = (Comput ((Q +* I),(Initialized t),(LifeSpan ((Q +* I),(Initialized t))))) . (intloc 0) by SCMFSA_M:2
.= (Result ((Q +* I),(Initialized t))) . (intloc 0) by A7, EXTPRO_1:23
.= (Result ((Q +* I),(Initialized t))) . (intloc 0)
.= (IExec (I,Q,t)) . (intloc 0) by SCMFSA6B:def 1
.= 1 by SCM_HALT:9 ;
(Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))) . a = (Comput ((Q +* I),(Initialized t),(LifeSpan ((Q +* I),(Initialized t))))) . a by A9, SCMFSA_M:2
.= (Result ((Q +* I),(Initialized t))) . a by A7, EXTPRO_1:23
.= (Result ((Q +* I),(Initialized t))) . a
.= (IExec (I,Q,t)) . a by SCMFSA6B:def 1 ;
then (Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))) . a < k + 1 by A1, A5;
then while>0 (a,I) is_halting_onInit Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3)),Q +* (while>0 (a,I)) by A3, INT_1:7;
then (Q +* (while>0 (a,I))) +* (while>0 (a,I)) halts_on Initialized (Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))) by SCM_HALT:def 5;
then A11: (Q +* (while>0 (a,I))) +* (while>0 (a,I)) halts_on Initialized (Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))) ;
IC (Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))) = 0 by A5, A8, A6, Th13;
then A12: Initialized (Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))) = Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3)) by A10, SCMFSA_M:8;

now :: thesis: ex mm being Element of NAT st CurInstr ((Q +* (while>0 (a,I))),(Comput ((Q +* (while>0 (a,I))),(Initialized t),mm))) = halt SCM+FSA

consider m being Element of NAT such that
A13: CurInstr ((Q +* (while>0 (a,I))),(Comput ((Q +* (while>0 (a,I))),(Comput ((Q +* (while>0 (a,I))),(Initialized t),((LifeSpan ((Q +* I),(Initialized t))) + 3))),m))) = halt SCM+FSA by A12, A11, EXTPRO_1:29;
take mm = ((LifeSpan ((Q +* I),(Initialized t))) + 3) + m; :: thesis: CurInstr ((Q +* (while>0 (a,I))),(Comput ((Q +* (while>0 (a,I))),(Initialized t),mm))) = halt SCM+FSA
thus CurInstr ((Q +* (while>0 (a,I))),(Comput ((Q +* (while>0 (a,I))),(Initialized t),mm))) = halt SCM+FSA by A13, EXTPRO_1:4; :: thesis: verum

end;

then Q +* (while>0 (a,I)) halts_on Initialized t by EXTPRO_1:29;
then Q +* (while>0 (a,I)) halts_on Initialized t ;
hence while>0 (a,I) is_halting_onInit t,Q by SCM_HALT:def 5; :: thesis: verum

end;

end;

end;

hence S₁[k + 1] ; :: thesis: verum

end;

A14: S₁[ 0 ] by Th8;
A15: for k being Element of NAT holds S₁[k] from NAT_1:sch 1(A14, A2);

now :: thesis: for t being State of SCM+FSA
for Q being Instruction-Sequence of SCM+FSA holds while>0 (a,I) is_halting_onInit t,Q

let t be State of SCM+FSA; :: thesis: for Q being Instruction-Sequence of SCM+FSA holds while>0 (a,I) is_halting_onInit Q,b₂

per cases ( t . a <= 0 or t . a > 0 ) ;

suppose t . a <= 0 ; :: thesis: for Q being Instruction-Sequence of SCM+FSA holds while>0 (a,I) is_halting_onInit Q,b₂

hence for Q being Instruction-Sequence of SCM+FSA holds while>0 (a,I) is_halting_onInit t,Q by Th8; :: thesis: verum

end;

suppose t . a > 0 ; :: thesis: for Q being Instruction-Sequence of SCM+FSA holds while>0 (a,I) is_halting_onInit Q,b₂

then reconsider n = t . a as Element of NAT by INT_1:3;
S₁[n] by A15;
hence for Q being Instruction-Sequence of SCM+FSA holds while>0 (a,I) is_halting_onInit t,Q ; :: thesis: verum

end;

end;

end;

hence while>0 (a,I) is InitHalting by SCM_HALT:26; :: thesis: verum