let x, b be non pair set ; :: thesis: for s being State of (BitCompCirc x,b) holds
( (Following s) . (CompOutput x,b) = xor2a . <*(s . x),(s . b)*> & (Following s) . x = s . x & (Following s) . b = s . b )
let s be State of (BitCompCirc x,b); :: thesis: ( (Following s) . (CompOutput x,b) = xor2a . <*(s . x),(s . b)*> & (Following s) . x = s . x & (Following s) . b = s . b )
set p = <*x,b*>;
set S = BitCompStr x,b;
A1: ( dom s = the carrier of (BitCompStr x,b) & x in the carrier of (BitCompStr x,b) ) by Th47, CIRCUIT1:4;
A2: b in the carrier of (BitCompStr x,b) by Th47;
InnerVertices (BitCompStr x,b) = the carrier' of (BitCompStr x,b) by FACIRC_1:37;
hence (Following s) . (CompOutput x,b) = xor2a . (s * <*x,b*>) by Th50, FACIRC_1:35
.= xor2a . <*(s . x),(s . b)*> by A1, A2, FINSEQ_2:145 ;
:: thesis: ( (Following s) . x = s . x & (Following s) . b = s . b )
( x in InputVertices (BitCompStr x,b) & b in InputVertices (BitCompStr x,b) ) by Th52;
hence ( (Following s) . x = s . x & (Following s) . b = s . b ) by CIRCUIT2:def 5; :: thesis: verum