let s be State of SCM+FSA ; :: thesis: for I being Program of SCM+FSA
for a being read-write Int-Location st s . a <= 0 holds
( while>0 a,I is_halting_onInit s & while>0 a,I is_closed_onInit s )
let I be Program of SCM+FSA ; :: thesis: for a being read-write Int-Location st s . a <= 0 holds
( while>0 a,I is_halting_onInit s & while>0 a,I is_closed_onInit s )
let a be read-write Int-Location ; :: thesis: ( s . a <= 0 implies ( while>0 a,I is_halting_onInit s & while>0 a,I is_closed_onInit s ) )
set s0 = Initialized s;
assume s . a <= 0 ; :: thesis: ( while>0 a,I is_halting_onInit s & while>0 a,I is_closed_onInit s )
then A1: (Initialized s) . a <= 0 by SCMFSA6C:3;
then A2: while>0 a,I is_closed_on Initialized s by SCMFSA_9:43;
while>0 a,I is_halting_on Initialized s by A1, SCMFSA_9:43;
hence ( while>0 a,I is_halting_onInit s & while>0 a,I is_closed_onInit s ) by A2, SCM_HALT:40, SCM_HALT:41; :: thesis: verum