let ap, bm, cp, dm be non pair set ; :: thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput ap,bm,cp)*>,and2b ] & not cin in InnerVertices (BitGFA1Str ap,bm,cp) holds
for s being State of (BitFTA1Circ ap,bm,cp,dm,cin)
for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds
( (Following s,4) . (GFA2AdderOutput (GFA1AdderOutput ap,bm,cp),cin,dm) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following s,4) . ap = a1 & (Following s,4) . bm = a2 & (Following s,4) . cp = a3 & (Following s,4) . dm = a4 & (Following s,4) . cin = a5 )
let cin be set ; :: thesis: ( cin <> [<*dm,(GFA1AdderOutput ap,bm,cp)*>,and2b ] & not cin in InnerVertices (BitGFA1Str ap,bm,cp) implies for s being State of (BitFTA1Circ ap,bm,cp,dm,cin)
for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds
( (Following s,4) . (GFA2AdderOutput (GFA1AdderOutput ap,bm,cp),cin,dm) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following s,4) . ap = a1 & (Following s,4) . bm = a2 & (Following s,4) . cp = a3 & (Following s,4) . dm = a4 & (Following s,4) . cin = a5 ) )
assume A1: ( cin <> [<*dm,(GFA1AdderOutput ap,bm,cp)*>,and2b ] & not cin in InnerVertices (BitGFA1Str ap,bm,cp) ) ; :: thesis: for s being State of (BitFTA1Circ ap,bm,cp,dm,cin)
for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds
( (Following s,4) . (GFA2AdderOutput (GFA1AdderOutput ap,bm,cp),cin,dm) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following s,4) . ap = a1 & (Following s,4) . bm = a2 & (Following s,4) . cp = a3 & (Following s,4) . dm = a4 & (Following s,4) . cin = a5 )
set S = BitFTA1Str ap,bm,cp,dm,cin;
A2: ( ap in InputVertices (BitFTA1Str ap,bm,cp,dm,cin) & bm in InputVertices (BitFTA1Str ap,bm,cp,dm,cin) ) by A1, Th16;
A3: ( cp in InputVertices (BitFTA1Str ap,bm,cp,dm,cin) & dm in InputVertices (BitFTA1Str ap,bm,cp,dm,cin) ) by A1, Th16;
let s be State of (BitFTA1Circ ap,bm,cp,dm,cin); :: thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds
( (Following s,4) . (GFA2AdderOutput (GFA1AdderOutput ap,bm,cp),cin,dm) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following s,4) . ap = a1 & (Following s,4) . bm = a2 & (Following s,4) . cp = a3 & (Following s,4) . dm = a4 & (Following s,4) . cin = a5 )
let a1, a2, a3, a4, a5 be Element of BOOLEAN ; :: thesis: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin implies ( (Following s,4) . (GFA2AdderOutput (GFA1AdderOutput ap,bm,cp),cin,dm) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following s,4) . ap = a1 & (Following s,4) . bm = a2 & (Following s,4) . cp = a3 & (Following s,4) . dm = a4 & (Following s,4) . cin = a5 ) )
assume A4: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin ) ; :: thesis: ( (Following s,4) . (GFA2AdderOutput (GFA1AdderOutput ap,bm,cp),cin,dm) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following s,4) . ap = a1 & (Following s,4) . bm = a2 & (Following s,4) . cp = a3 & (Following s,4) . dm = a4 & (Following s,4) . cin = a5 )
A5: ( (Following s,3) . cp = a3 & (Following s,3) . dm = a4 ) by A1, A4, Lm16;
set A1 = GFA1AdderOutput ap,bm,cp;
set A2 = GFA2AdderOutput (GFA1AdderOutput ap,bm,cp),cin,dm;
set A1cin = [<*(GFA1AdderOutput ap,bm,cp),cin*>,xor2c ];
A6: Following s,(3 + 1) = Following (Following s,3) by FACIRC_1:12;
( (Following s,3) . [<*(GFA1AdderOutput ap,bm,cp),cin*>,xor2c ] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following s,3) . dm = a4 ) by A1, A4, Lm16;
hence (Following s,4) . (GFA2AdderOutput (GFA1AdderOutput ap,bm,cp),cin,dm) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' a5) 'xor' ('not' a4) by A6, Lm18
.= (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 by XBOOLEAN:73 ;
:: thesis: ( (Following s,4) . ap = a1 & (Following s,4) . bm = a2 & (Following s,4) . cp = a3 & (Following s,4) . dm = a4 & (Following s,4) . cin = a5 )
A7: (Following s,3) . cin = a5 by A1, A4, Lm16;
A8: cin in InputVertices (BitFTA1Str ap,bm,cp,dm,cin) by A1, Th16;
( (Following s,3) . ap = a1 & (Following s,3) . bm = a2 ) by A1, A4, Lm16;
hence ( (Following s,4) . ap = a1 & (Following s,4) . bm = a2 & (Following s,4) . cp = a3 & (Following s,4) . dm = a4 & (Following s,4) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def 5; :: thesis: verum