let ap, bm, cp be non pair set ; :: thesis: for dm, cin being set
for s being State of (BitFTA1Circ ap,bm,cp,dm,cin)
for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp holds
( (Following s,2) . (BitFTA1CarryOutput ap,bm,cp,dm,cin) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following s,2) . (BitFTA1AdderOutputI ap,bm,cp,dm,cin) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) )
let dm, cin be set ; :: thesis: for s being State of (BitFTA1Circ ap,bm,cp,dm,cin)
for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp holds
( (Following s,2) . (BitFTA1CarryOutput ap,bm,cp,dm,cin) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following s,2) . (BitFTA1AdderOutputI ap,bm,cp,dm,cin) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) )
let s be State of (BitFTA1Circ ap,bm,cp,dm,cin); :: thesis: for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp holds
( (Following s,2) . (BitFTA1CarryOutput ap,bm,cp,dm,cin) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following s,2) . (BitFTA1AdderOutputI ap,bm,cp,dm,cin) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) )
set S1 = BitGFA1Str ap,bm,cp;
set C1 = BitGFA1Circ ap,bm,cp;
set A1 = GFA1AdderOutput ap,bm,cp;
set A2 = GFA1CarryOutput ap,bm,cp;
set S2 = BitGFA2Str (GFA1AdderOutput ap,bm,cp),cin,dm;
set C2 = BitGFA2Circ (GFA1AdderOutput ap,bm,cp),cin,dm;
let a1, a2, a3 be Element of BOOLEAN ; :: thesis: ( a1 = s . ap & a2 = s . bm & a3 = s . cp implies ( (Following s,2) . (BitFTA1CarryOutput ap,bm,cp,dm,cin) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following s,2) . (BitFTA1AdderOutputI ap,bm,cp,dm,cin) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) ) )
assume that
A1: a1 = s . ap and
A2: a2 = s . bm and
A3: a3 = s . cp ; :: thesis: ( (Following s,2) . (BitFTA1CarryOutput ap,bm,cp,dm,cin) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following s,2) . (BitFTA1AdderOutputI ap,bm,cp,dm,cin) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) )
reconsider s1 = s | the carrier of (BitGFA1Str ap,bm,cp) as State of (BitGFA1Circ ap,bm,cp) by FACIRC_1:26;
A4: dom s1 = the carrier of (BitGFA1Str ap,bm,cp) by CIRCUIT1:4;
ap in the carrier of (BitGFA1Str ap,bm,cp) by GFACIRC1:81;
then A5: a1 = s1 . ap by A1, A4, FUNCT_1:70;
reconsider t = s as State of ((BitGFA1Circ ap,bm,cp) +* (BitGFA2Circ (GFA1AdderOutput ap,bm,cp),cin,dm)) ;
A6: InputVertices (BitGFA1Str ap,bm,cp) misses InnerVertices (BitGFA2Str (GFA1AdderOutput ap,bm,cp),cin,dm) by Lm12;
cp in the carrier of (BitGFA1Str ap,bm,cp) by GFACIRC1:81;
then A7: a3 = s1 . cp by A3, A4, FUNCT_1:70;
bm in the carrier of (BitGFA1Str ap,bm,cp) by GFACIRC1:81;
then A8: a2 = s1 . bm by A2, A4, FUNCT_1:70;
GFA1CarryOutput ap,bm,cp in the carrier of (BitGFA1Str ap,bm,cp) by GFACIRC1:81;
then (Following t,2) . (GFA1CarryOutput ap,bm,cp) = (Following s1,2) . (GFA1CarryOutput ap,bm,cp) by A6, FACIRC_1:32;
hence (Following s,2) . (BitFTA1CarryOutput ap,bm,cp,dm,cin) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) by A5, A8, A7, GFACIRC1:84; :: thesis: (Following s,2) . (BitFTA1AdderOutputI ap,bm,cp,dm,cin) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3)
GFA1AdderOutput ap,bm,cp in the carrier of (BitGFA1Str ap,bm,cp) by GFACIRC1:81;
then (Following t,2) . (GFA1AdderOutput ap,bm,cp) = (Following s1,2) . (GFA1AdderOutput ap,bm,cp) by A6, FACIRC_1:32;
hence (Following s,2) . (BitFTA1AdderOutputI ap,bm,cp,dm,cin) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) by A5, A8, A7, GFACIRC1:84; :: thesis: verum