let V be RealLinearSpace; for x, y, u, v, u1, v1, w being VECTOR of V st Gen x,y & u,v,u1,v1 are_COrte_wrt x,y & u,v,u1,w are_COrte_wrt x,y & not u,v,v1,w are_COrte_wrt x,y holds
u,v,w,v1 are_COrte_wrt x,y
let x, y, u, v, u1, v1, w be VECTOR of V; ( Gen x,y & u,v,u1,v1 are_COrte_wrt x,y & u,v,u1,w are_COrte_wrt x,y & not u,v,v1,w are_COrte_wrt x,y implies u,v,w,v1 are_COrte_wrt x,y )
assume that
A1:
Gen x,y
and
A2:
u,v,u1,v1 are_COrte_wrt x,y
and
A3:
u,v,u1,w are_COrte_wrt x,y
; ( u,v,v1,w are_COrte_wrt x,y or u,v,w,v1 are_COrte_wrt x,y )
A4:
Orte x,y,u, Orte x,y,v // u1,v1
by A2, Def3;
A5:
Orte x,y,u, Orte x,y,v // u1,w
by A3, Def3;
now assume A6:
u <> v
;
( u,v,v1,w are_COrte_wrt x,y or u,v,w,v1 are_COrte_wrt x,y )now assume that A7:
u1 <> v1
and A8:
u1 <> w
;
( u,v,v1,w are_COrte_wrt x,y or u,v,w,v1 are_COrte_wrt x,y )A9:
u1,
v1 // u1,
w
by A1, A4, A5, A6, Th13, ANALOAF:20;
A10:
now assume A11:
u1,
v1 // v1,
w
;
( u,v,v1,w are_COrte_wrt x,y or u,v,w,v1 are_COrte_wrt x,y )
u1,
v1 // Orte x,
y,
u,
Orte x,
y,
v
by A4, ANALOAF:21;
then
Orte x,
y,
u,
Orte x,
y,
v // v1,
w
by A7, A11, ANALOAF:20;
hence
(
u,
v,
v1,
w are_COrte_wrt x,
y or
u,
v,
w,
v1 are_COrte_wrt x,
y )
by Def3;
verum end; now assume A12:
u1,
w // w,
v1
;
( u,v,v1,w are_COrte_wrt x,y or u,v,w,v1 are_COrte_wrt x,y )
u1,
w // Orte x,
y,
u,
Orte x,
y,
v
by A5, ANALOAF:21;
then
Orte x,
y,
u,
Orte x,
y,
v // w,
v1
by A8, A12, ANALOAF:20;
hence
(
u,
v,
v1,
w are_COrte_wrt x,
y or
u,
v,
w,
v1 are_COrte_wrt x,
y )
by Def3;
verum end; hence
(
u,
v,
v1,
w are_COrte_wrt x,
y or
u,
v,
w,
v1 are_COrte_wrt x,
y )
by A9, A10, ANALOAF:23;
verum end; hence
(
u,
v,
v1,
w are_COrte_wrt x,
y or
u,
v,
w,
v1 are_COrte_wrt x,
y )
by A2, A3;
verum end;
hence
( u,v,v1,w are_COrte_wrt x,y or u,v,w,v1 are_COrte_wrt x,y )
by Th20; verum