let s1, s2 be State of SCM+FSA ; for i being Instruction of SCM+FSA
for a being Int-Location st ( for b being Int-Location st a <> b holds
s1 . b = s2 . b ) & ( for f being FinSeq-Location holds s1 . f = s2 . f ) & i does_not_refer a & IC s1 = IC s2 holds
( ( for b being Int-Location st a <> b holds
(Exec i,s1) . b = (Exec i,s2) . b ) & ( for f being FinSeq-Location holds (Exec i,s1) . f = (Exec i,s2) . f ) & IC (Exec i,s1) = IC (Exec i,s2) )
let i be Instruction of SCM+FSA ; for a being Int-Location st ( for b being Int-Location st a <> b holds
s1 . b = s2 . b ) & ( for f being FinSeq-Location holds s1 . f = s2 . f ) & i does_not_refer a & IC s1 = IC s2 holds
( ( for b being Int-Location st a <> b holds
(Exec i,s1) . b = (Exec i,s2) . b ) & ( for f being FinSeq-Location holds (Exec i,s1) . f = (Exec i,s2) . f ) & IC (Exec i,s1) = IC (Exec i,s2) )
let a be Int-Location ; ( ( for b being Int-Location st a <> b holds
s1 . b = s2 . b ) & ( for f being FinSeq-Location holds s1 . f = s2 . f ) & i does_not_refer a & IC s1 = IC s2 implies ( ( for b being Int-Location st a <> b holds
(Exec i,s1) . b = (Exec i,s2) . b ) & ( for f being FinSeq-Location holds (Exec i,s1) . f = (Exec i,s2) . f ) & IC (Exec i,s1) = IC (Exec i,s2) ) )
defpred S1[ State of SCM+FSA , State of SCM+FSA ] means ( ( for b being Int-Location st a <> b holds
$1 . b = $2 . b ) & ( for f being FinSeq-Location holds $1 . f = $2 . f ) );
assume A1:
S1[s1,s2]
; ( not i does_not_refer a or not IC s1 = IC s2 or ( ( for b being Int-Location st a <> b holds
(Exec i,s1) . b = (Exec i,s2) . b ) & ( for f being FinSeq-Location holds (Exec i,s1) . f = (Exec i,s2) . f ) & IC (Exec i,s1) = IC (Exec i,s2) ) )
A2:
( not InsCode i <= 9 + 1 or InsCode i <= 8 + 1 or InsCode i = 10 )
by NAT_1:8;
A3:
( not InsCode i <= 10 + 1 or InsCode i <= 10 or InsCode i = 11 )
by NAT_1:8;
assume A4:
i does_not_refer a
; ( not IC s1 = IC s2 or ( ( for b being Int-Location st a <> b holds
(Exec i,s1) . b = (Exec i,s2) . b ) & ( for f being FinSeq-Location holds (Exec i,s1) . f = (Exec i,s2) . f ) & IC (Exec i,s1) = IC (Exec i,s2) ) )
A5:
InsCode i <= 11 + 1
by SCMFSA_2:35;
A6:
now let b be
Int-Location ;
( a <> b implies (Exec i,s1) . b1 = (Exec i,s2) . b1 )assume A7:
a <> b
;
(Exec i,s1) . b1 = (Exec i,s2) . b1per cases
( InsCode i = 0 or InsCode i = 1 or InsCode i = 2 or InsCode i = 3 or InsCode i = 4 or InsCode i = 5 or InsCode i = 6 or InsCode i = 7 or InsCode i = 8 or InsCode i = 9 or InsCode i = 10 or InsCode i = 11 or InsCode i = 12 )
by A5, A3, A2, NAT_1:8, NAT_1:33;
suppose
InsCode i = 9
;
(Exec i,s1) . b1 = (Exec i,s2) . b1then consider db,
da being
Int-Location ,
g being
FinSeq-Location such that A34:
i = da := g,
db
by SCMFSA_2:62;
A35:
a <> db
by A4, A34, SCMFSA7B:def 1;
hereby verum
per cases
( b = da or b <> da )
;
suppose A36:
b = da
;
(Exec i,s1) . b = (Exec i,s2) . bthen consider m2 being
Element of
NAT such that A37:
m2 = abs (s2 . db)
and A38:
(Exec (da := g,db),s2) . b = (s2 . g) /. m2
by SCMFSA_2:98;
consider m1 being
Element of
NAT such that A39:
m1 = abs (s1 . db)
and A40:
(Exec (da := g,db),s1) . b = (s1 . g) /. m1
by A36, SCMFSA_2:98;
m1 = m2
by A1, A35, A39, A37;
hence
(Exec i,s1) . b = (Exec i,s2) . b
by A1, A34, A40, A38;
verum end; end;
end; end; end; end;
assume A47:
IC s1 = IC s2
; ( ( for b being Int-Location st a <> b holds
(Exec i,s1) . b = (Exec i,s2) . b ) & ( for f being FinSeq-Location holds (Exec i,s1) . f = (Exec i,s2) . f ) & IC (Exec i,s1) = IC (Exec i,s2) )
now let f be
FinSeq-Location ;
(Exec i,s1) . b1 = (Exec i,s2) . b1per cases
( InsCode i = 0 or InsCode i = 1 or InsCode i = 2 or InsCode i = 3 or InsCode i = 4 or InsCode i = 5 or InsCode i = 6 or InsCode i = 7 or InsCode i = 8 or InsCode i = 9 or InsCode i = 10 or InsCode i = 11 or InsCode i = 12 )
by A5, A3, A2, NAT_1:8, NAT_1:33;
suppose
InsCode i = 10
;
(Exec i,s1) . b1 = (Exec i,s2) . b1then consider db,
da being
Int-Location ,
g being
FinSeq-Location such that A58:
i = g,
db := da
by SCMFSA_2:63;
A59:
a <> db
by A4, A58, SCMFSA7B:def 1;
A60:
a <> da
by A4, A58, SCMFSA7B:def 1;
hereby verum
per cases
( f = g or f <> g )
;
suppose A61:
f = g
;
(Exec i,s1) . f = (Exec i,s2) . fA62:
s1 . da = s2 . da
by A1, A60;
consider m2 being
Element of
NAT such that A63:
m2 = abs (s2 . db)
and A64:
(Exec (g,db := da),s2) . g = (s2 . g) +* m2,
(s2 . da)
by SCMFSA_2:99;
consider m1 being
Element of
NAT such that A65:
m1 = abs (s1 . db)
and A66:
(Exec (g,db := da),s1) . g = (s1 . g) +* m1,
(s1 . da)
by SCMFSA_2:99;
m1 = m2
by A1, A59, A65, A63;
hence
(Exec i,s1) . f = (Exec i,s2) . f
by A1, A58, A61, A66, A64, A62;
verum end; end;
end; end; suppose
InsCode i = 12
;
(Exec i,s1) . b1 = (Exec i,s2) . b1then consider da being
Int-Location ,
g being
FinSeq-Location such that A69:
i = g :=<0,...,0> da
by SCMFSA_2:65;
A70:
a <> da
by A4, A69, SCMFSA7B:def 1;
hereby verum
per cases
( f = g or f <> g )
;
suppose A71:
f = g
;
(Exec i,s1) . f = (Exec i,s2) . fA72:
ex
m2 being
Element of
NAT st
(
m2 = abs (s2 . da) &
(Exec (g :=<0,...,0> da),s2) . g = m2 |-> 0 )
by SCMFSA_2:101;
ex
m1 being
Element of
NAT st
(
m1 = abs (s1 . da) &
(Exec (g :=<0,...,0> da),s1) . g = m1 |-> 0 )
by SCMFSA_2:101;
hence
(Exec i,s1) . f = (Exec i,s2) . f
by A1, A69, A70, A71, A72;
verum end; end;
end; end; end; end;
hence
S1[ Exec i,s1, Exec i,s2]
by A6; IC (Exec i,s1) = IC (Exec i,s2)
hence
IC (Exec i,s1) = IC (Exec i,s2)
; verum