let x, y, z be set ; :: thesis: ( x in the carrier of (BitGFA0Str x,y,z) & y in the carrier of (BitGFA0Str x,y,z) & z in the carrier of (BitGFA0Str x,y,z) & [<*x,y*>,xor2 ] in the carrier of (BitGFA0Str x,y,z) & [<*[<*x,y*>,xor2 ],z*>,xor2 ] in the carrier of (BitGFA0Str x,y,z) & [<*x,y*>,and2 ] in the carrier of (BitGFA0Str x,y,z) & [<*y,z*>,and2 ] in the carrier of (BitGFA0Str x,y,z) & [<*z,x*>,and2 ] in the carrier of (BitGFA0Str x,y,z) & [<*[<*x,y*>,and2 ],[<*y,z*>,and2 ],[<*z,x*>,and2 ]*>,or3 ] in the carrier of (BitGFA0Str x,y,z) )
set f1 = and2 ;
set f2 = and2 ;
set f3 = and2 ;
set f4 = or3 ;
set f0 = xor2 ;
set xy = [<*x,y*>,and2 ];
set yz = [<*y,z*>,and2 ];
set zx = [<*z,x*>,and2 ];
set xyz = [<*[<*x,y*>,and2 ],[<*y,z*>,and2 ],[<*z,x*>,and2 ]*>,or3 ];
set S1 = GFA0AdderStr x,y,z;
set S2 = GFA0CarryStr x,y,z;
A1: ( x in the carrier of (GFA0AdderStr x,y,z) & y in the carrier of (GFA0AdderStr x,y,z) ) by FACIRC_1:60;
A2: ( z in the carrier of (GFA0AdderStr x,y,z) & [<*x,y*>,xor2 ] in the carrier of (GFA0AdderStr x,y,z) ) by FACIRC_1:60, FACIRC_1:61;
A3: [<*[<*x,y*>,and2 ],[<*y,z*>,and2 ],[<*z,x*>,and2 ]*>,or3 ] in the carrier of (GFA0CarryStr x,y,z) by Th19;
A4: ( [<*y,z*>,and2 ] in the carrier of (GFA0CarryStr x,y,z) & [<*z,x*>,and2 ] in the carrier of (GFA0CarryStr x,y,z) ) by Th19;
( [<*[<*x,y*>,xor2 ],z*>,xor2 ] in the carrier of (GFA0AdderStr x,y,z) & [<*x,y*>,and2 ] in the carrier of (GFA0CarryStr x,y,z) ) by Th19, FACIRC_1:61;
hence ( x in the carrier of (BitGFA0Str x,y,z) & y in the carrier of (BitGFA0Str x,y,z) & z in the carrier of (BitGFA0Str x,y,z) & [<*x,y*>,xor2 ] in the carrier of (BitGFA0Str x,y,z) & [<*[<*x,y*>,xor2 ],z*>,xor2 ] in the carrier of (BitGFA0Str x,y,z) & [<*x,y*>,and2 ] in the carrier of (BitGFA0Str x,y,z) & [<*y,z*>,and2 ] in the carrier of (BitGFA0Str x,y,z) & [<*z,x*>,and2 ] in the carrier of (BitGFA0Str x,y,z) & [<*[<*x,y*>,and2 ],[<*y,z*>,and2 ],[<*z,x*>,and2 ]*>,or3 ] in the carrier of (BitGFA0Str x,y,z) ) by A1, A2, A4, A3, FACIRC_1:20; :: thesis: verum