let am, bm, cm be non pair set ; :: thesis: for dm, cin being set
for s being State of (BitFTA3Circ am,bm,cm,dm,cin)
for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm holds
( (Following s,2) . (BitFTA3CarryOutput am,bm,cm,dm,cin) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following s,2) . (BitFTA3AdderOutputI am,bm,cm,dm,cin) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) )
let dm, cin be set ; :: thesis: for s being State of (BitFTA3Circ am,bm,cm,dm,cin)
for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm holds
( (Following s,2) . (BitFTA3CarryOutput am,bm,cm,dm,cin) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following s,2) . (BitFTA3AdderOutputI am,bm,cm,dm,cin) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) )
let s be State of (BitFTA3Circ am,bm,cm,dm,cin); :: thesis: for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm holds
( (Following s,2) . (BitFTA3CarryOutput am,bm,cm,dm,cin) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following s,2) . (BitFTA3AdderOutputI am,bm,cm,dm,cin) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) )
set S1 = BitGFA3Str am,bm,cm;
set C1 = BitGFA3Circ am,bm,cm;
set A1 = GFA3AdderOutput am,bm,cm;
set A2 = GFA3CarryOutput am,bm,cm;
set S2 = BitGFA3Str (GFA3AdderOutput am,bm,cm),cin,dm;
set C2 = BitGFA3Circ (GFA3AdderOutput am,bm,cm),cin,dm;
let a1, a2, a3 be Element of BOOLEAN ; :: thesis: ( a1 = s . am & a2 = s . bm & a3 = s . cm implies ( (Following s,2) . (BitFTA3CarryOutput am,bm,cm,dm,cin) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following s,2) . (BitFTA3AdderOutputI am,bm,cm,dm,cin) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) ) )
assume that
A1: a1 = s . am and
A2: a2 = s . bm and
A3: a3 = s . cm ; :: thesis: ( (Following s,2) . (BitFTA3CarryOutput am,bm,cm,dm,cin) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following s,2) . (BitFTA3AdderOutputI am,bm,cm,dm,cin) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) )
reconsider s1 = s | the carrier of (BitGFA3Str am,bm,cm) as State of (BitGFA3Circ am,bm,cm) by FACIRC_1:26;
A4: dom s1 = the carrier of (BitGFA3Str am,bm,cm) by CIRCUIT1:4;
am in the carrier of (BitGFA3Str am,bm,cm) by GFACIRC1:155;
then A5: a1 = s1 . am by A1, A4, FUNCT_1:70;
reconsider t = s as State of ((BitGFA3Circ am,bm,cm) +* (BitGFA3Circ (GFA3AdderOutput am,bm,cm),cin,dm)) ;
A6: InputVertices (BitGFA3Str am,bm,cm) misses InnerVertices (BitGFA3Str (GFA3AdderOutput am,bm,cm),cin,dm) by Lm32;
cm in the carrier of (BitGFA3Str am,bm,cm) by GFACIRC1:155;
then A7: a3 = s1 . cm by A3, A4, FUNCT_1:70;
bm in the carrier of (BitGFA3Str am,bm,cm) by GFACIRC1:155;
then A8: a2 = s1 . bm by A2, A4, FUNCT_1:70;
GFA3CarryOutput am,bm,cm in the carrier of (BitGFA3Str am,bm,cm) by GFACIRC1:155;
then (Following t,2) . (GFA3CarryOutput am,bm,cm) = (Following s1,2) . (GFA3CarryOutput am,bm,cm) by A6, FACIRC_1:32;
hence (Following s,2) . (BitFTA3CarryOutput am,bm,cm,dm,cin) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) by A5, A8, A7, GFACIRC1:158; :: thesis: (Following s,2) . (BitFTA3AdderOutputI am,bm,cm,dm,cin) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))
GFA3AdderOutput am,bm,cm in the carrier of (BitGFA3Str am,bm,cm) by GFACIRC1:155;
then (Following t,2) . (GFA3AdderOutput am,bm,cm) = (Following s1,2) . (GFA3AdderOutput am,bm,cm) by A6, FACIRC_1:32;
hence (Following s,2) . (BitFTA3AdderOutputI am,bm,cm,dm,cin) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) by A5, A8, A7, GFACIRC1:158; :: thesis: verum