let a, b be FinSequence; :: thesis: ( 0 -BitAdderStr a,b = 1GateCircStr <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & 0 -BitAdderCirc a,b = 1GateCircuit <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & 0 -BitMajorityOutput a,b = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )] )
A1: ex f, g, h being ManySortedSet of NAT st
( 0 -BitAdderStr a,b = f . 0 & 0 -BitAdderCirc a,b = g . 0 & f . 0 = 1GateCircStr <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & g . 0 = 1GateCircuit <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & h . 0 = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )] & ( for n being Nat
for S being non empty ManySortedSign
for A being non-empty MSAlgebra of S
for z being set st S = f . n & A = g . n & z = h . n holds
( f . (n + 1) = S +* (BitAdderWithOverflowStr (a . (n + 1)),(b . (n + 1)),z) & g . (n + 1) = A +* (BitAdderWithOverflowCirc (a . (n + 1)),(b . (n + 1)),z) & h . (n + 1) = MajorityOutput (a . (n + 1)),(b . (n + 1)),z ) ) ) by Def4;
hence 0 -BitAdderStr a,b = 1GateCircStr <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) ; :: thesis: ( 0 -BitAdderCirc a,b = 1GateCircuit <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & 0 -BitMajorityOutput a,b = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )] )
thus 0 -BitAdderCirc a,b = 1GateCircuit <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) by A1; :: thesis: 0 -BitMajorityOutput a,b = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )]
InnerVertices (0 -BitAdderStr a,b) = {[<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )]} by A1, CIRCCOMB:49;
hence 0 -BitMajorityOutput a,b = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )] by TARSKI:def 1; :: thesis: verum