let n be Element of NAT ; for R being good Ring
for a being Data-Location of R
for loc being Instruction-Location of SCM R
for s1, s2 being State of st not R is trivial holds
for p being non NAT -defined autonomic FinPartState of st p c= s1 & p c= s2 & CurInstr (Computation s1,n) = a =0_goto loc & loc <> Next (IC (Computation s1,n)) holds
( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R )
let R be good Ring; for a being Data-Location of R
for loc being Instruction-Location of SCM R
for s1, s2 being State of st not R is trivial holds
for p being non NAT -defined autonomic FinPartState of st p c= s1 & p c= s2 & CurInstr (Computation s1,n) = a =0_goto loc & loc <> Next (IC (Computation s1,n)) holds
( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R )
let a be Data-Location of R; for loc being Instruction-Location of SCM R
for s1, s2 being State of st not R is trivial holds
for p being non NAT -defined autonomic FinPartState of st p c= s1 & p c= s2 & CurInstr (Computation s1,n) = a =0_goto loc & loc <> Next (IC (Computation s1,n)) holds
( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R )
let loc be Instruction-Location of SCM R; for s1, s2 being State of st not R is trivial holds
for p being non NAT -defined autonomic FinPartState of st p c= s1 & p c= s2 & CurInstr (Computation s1,n) = a =0_goto loc & loc <> Next (IC (Computation s1,n)) holds
( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R )
let s1, s2 be State of ; ( not R is trivial implies for p being non NAT -defined autonomic FinPartState of st p c= s1 & p c= s2 & CurInstr (Computation s1,n) = a =0_goto loc & loc <> Next (IC (Computation s1,n)) holds
( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R ) )
assume A1:
not R is trivial
; for p being non NAT -defined autonomic FinPartState of st p c= s1 & p c= s2 & CurInstr (Computation s1,n) = a =0_goto loc & loc <> Next (IC (Computation s1,n)) holds
( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R )
set Cs2i1 = Computation s2,(n + 1);
set Cs1i1 = Computation s1,(n + 1);
set I = CurInstr (Computation s1,n);
let p be non NAT -defined autonomic FinPartState of ; ( p c= s1 & p c= s2 & CurInstr (Computation s1,n) = a =0_goto loc & loc <> Next (IC (Computation s1,n)) implies ( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R ) )
assume A2:
( p c= s1 & p c= s2 )
; ( not CurInstr (Computation s1,n) = a =0_goto loc or not loc <> Next (IC (Computation s1,n)) or ( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R ) )
A3:
CurInstr (Computation s1,n) = CurInstr (Computation s2,n)
by A1, A2, Th28;
set Cs2i = Computation s2,n;
set Cs1i = Computation s1,n;
A4: Computation s1,(n + 1) =
Following (Computation s1,n)
by AMI_1:14
.=
Exec (CurInstr (Computation s1,n)),(Computation s1,n)
;
A5: Computation s2,(n + 1) =
Following (Computation s2,n)
by AMI_1:14
.=
Exec (CurInstr (Computation s2,n)),(Computation s2,n)
;
A6:
( ((Computation s1,(n + 1)) | (dom p)) . (IC (SCM R)) = (Computation s1,(n + 1)) . (IC (SCM R)) & ((Computation s2,(n + 1)) | (dom p)) . (IC (SCM R)) = (Computation s2,(n + 1)) . (IC (SCM R)) )
by A1, Th25, FUNCT_1:72;
assume that
A7:
CurInstr (Computation s1,n) = a =0_goto loc
and
A8:
loc <> Next (IC (Computation s1,n))
; ( (Computation s1,n) . a = 0. R iff (Computation s2,n) . a = 0. R )
A9:
IC (Computation s1,n) = IC (Computation s2,n)
by A1, A2, Th28;
hereby ( (Computation s2,n) . a = 0. R implies (Computation s1,n) . a = 0. R )
assume
(
(Computation s1,n) . a = 0. R &
(Computation s2,n) . a <> 0. R )
;
contradictionthen
(
(Computation s1,(n + 1)) . (IC (SCM R)) = loc &
(Computation s2,(n + 1)) . (IC (SCM R)) = Next (IC (Computation s2,n)) )
by A3, A4, A5, A7, SCMRING2:18;
hence
contradiction
by A2, A9, A6, A8, AMI_1:def 25;
verum
end;
assume that
A10:
(Computation s2,n) . a = 0. R
and
A11:
(Computation s1,n) . a <> 0. R
; contradiction
A12:
(Computation s1,(n + 1)) . (IC (SCM R)) = Next (IC (Computation s1,n))
by A4, A7, A11, SCMRING2:18;
(Computation s2,(n + 1)) . (IC (SCM R)) = loc
by A3, A5, A7, A10, SCMRING2:18;
hence
contradiction
by A2, A6, A8, A12, AMI_1:def 25; verum