set S0 = 1GateCircStr <*> ,((0 -tuples_on BOOLEAN ) --> FALSE );
set A0 = 1GateCircuit <*> ,((0 -tuples_on BOOLEAN ) --> FALSE );
set Sn = n -BitGFA0Str x,y;
set o0 = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )];
deffunc H1( non empty ManySortedSign , set , Nat) -> ManySortedSign = $1 +* (BitGFA0Str (x . ($3 + 1)),(y . ($3 + 1)),$2);
deffunc H2( non empty ManySortedSign , non-empty MSAlgebra of $1, set , Nat) -> MSAlgebra of $1 +* (BitGFA0Str (x . ($4 + 1)),(y . ($4 + 1)),$3) = $2 +* (BitGFA0Circ (x . ($4 + 1)),(y . ($4 + 1)),$3);
deffunc H3( set , Nat) -> Element of InnerVertices (GFA0CarryStr (x . ($2 + 1)),(y . ($2 + 1)),$1) = GFA0CarryOutput (x . ($2 + 1)),(y . ($2 + 1)),$1;
A2:
for S being non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign
for x being set
for n being Nat holds
( H1(S,x,n) is unsplit & H1(S,x,n) is gate`1=arity & H1(S,x,n) is gate`2isBoolean & not H1(S,x,n) is void & H1(S,x,n) is strict )
;
A3:
ex f, h being ManySortedSet of st
( n -BitGFA0Str x,y = f . n & f . 0 = 1GateCircStr <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & h . 0 = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )] & ( for n being Nat
for S being non empty ManySortedSign
for x being set st S = f . n & x = h . n holds
( f . (n + 1) = H1(S,x,n) & h . (n + 1) = H3(x,n) ) ) )
by Def1;
A4:
for S being non empty ManySortedSign
for A being non-empty MSAlgebra of S
for x being set
for n being Nat holds H2(S,A,x,n) is non-empty MSAlgebra of H1(S,x,n)
;
A5:
for S, S1 being non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign
for A being strict gate`2=den Boolean Circuit of S
for x being set
for n being Nat st S1 = H1(S,x,n) holds
H2(S,A,x,n) is strict gate`2=den Boolean Circuit of S1
;
ex A being strict gate`2=den Boolean Circuit of n -BitGFA0Str x,y ex f, g, h being ManySortedSet of st
( n -BitGFA0Str x,y = f . n & A = g . n & f . 0 = 1GateCircStr <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & g . 0 = 1GateCircuit <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & h . 0 = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )] & ( for n being Nat
for S being non empty ManySortedSign
for A being non-empty MSAlgebra of S
for x being set st S = f . n & A = g . n & x = h . n holds
( f . (n + 1) = H1(S,x,n) & g . (n + 1) = H2(S,A,x,n) & h . (n + 1) = H3(x,n) ) ) )
from CIRCCMB2:sch 19(A2, A3, A4, A5);
hence
ex b1 being strict gate`2=den Boolean Circuit of n -BitGFA0Str x,y ex f, g, h being ManySortedSet of st
( n -BitGFA0Str x,y = f . n & b1 = g . n & f . 0 = 1GateCircStr <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & g . 0 = 1GateCircuit <*> ,((0 -tuples_on BOOLEAN ) --> FALSE ) & h . 0 = [<*> ,((0 -tuples_on BOOLEAN ) --> FALSE )] & ( for n being Nat
for S being non empty ManySortedSign
for A being non-empty MSAlgebra of S
for z being set st S = f . n & A = g . n & z = h . n holds
( f . (n + 1) = S +* (BitGFA0Str (x . (n + 1)),(y . (n + 1)),z) & g . (n + 1) = A +* (BitGFA0Circ (x . (n + 1)),(y . (n + 1)),z) & h . (n + 1) = GFA0CarryOutput (x . (n + 1)),(y . (n + 1)),z ) ) )
; :: thesis: verum