set f0 = xor2c ;
set f1 = and2c ;
set f2 = and2a ;
set f3 = and2 ;
let x, y, z be set ; :: thesis: ( z <> [<*x,y*>,xor2c ] & x <> [<*y,z*>,and2a ] & y <> [<*z,x*>,and2 ] & z <> [<*x,y*>,and2c ] implies for s being State of (BitGFA1Circ x,y,z) holds Following s,2 is stable )
assume A1: ( z <> [<*x,y*>,xor2c ] & x <> [<*y,z*>,and2a ] & y <> [<*z,x*>,and2 ] & z <> [<*x,y*>,and2c ] ) ; :: thesis: for s being State of (BitGFA1Circ x,y,z) holds Following s,2 is stable
set S = BitGFA1Str x,y,z;
set S1 = GFA1AdderStr x,y,z;
set S2 = GFA1CarryStr x,y,z;
set A = BitGFA1Circ x,y,z;
set A1 = GFA1AdderCirc x,y,z;
set A2 = GFA1CarryCirc x,y,z;
let s be State of (BitGFA1Circ x,y,z); :: thesis: Following s,2 is stable
reconsider s1 = s | the carrier of (GFA1AdderStr x,y,z) as State of (GFA1AdderCirc x,y,z) by FACIRC_1:26;
reconsider s2 = s | the carrier of (GFA1CarryStr x,y,z) as State of (GFA1CarryCirc x,y,z) by FACIRC_1:26;
reconsider t = s as State of ((GFA1AdderCirc x,y,z) +* (GFA1CarryCirc x,y,z)) ;
InputVertices (GFA1AdderStr x,y,z) = {x,y,z} by A1, FACIRC_1:57;
then A2: InputVertices (GFA1AdderStr x,y,z) = InputVertices (GFA1CarryStr x,y,z) by A1, Th53;
( InnerVertices (GFA1AdderStr x,y,z) misses InputVertices (GFA1AdderStr x,y,z) & InnerVertices (GFA1CarryStr x,y,z) misses InputVertices (GFA1CarryStr x,y,z) ) by XBOOLE_1:79;
then A3: ( Following s1,2 = (Following t,2) | the carrier of (GFA1AdderStr x,y,z) & Following s1,3 = (Following t,3) | the carrier of (GFA1AdderStr x,y,z) & Following s2,2 = (Following t,2) | the carrier of (GFA1CarryStr x,y,z) & Following s2,3 = (Following t,3) | the carrier of (GFA1CarryStr x,y,z) ) by A2, FACIRC_1:30, FACIRC_1:31;
Following s1,2 is stable by A1, FACIRC_1:63;
then A4: Following s1,2 = Following (Following s1,2) by CIRCUIT2:def 6
.= Following s1,(2 + 1) by FACIRC_1:12 ;
Following s2,2 is stable by A1, Th62;
then A5: Following s2,2 = Following (Following s2,2) by CIRCUIT2:def 6
.= Following s2,(2 + 1) by FACIRC_1:12 ;
A6: Following s,(2 + 1) = Following (Following s,2) by FACIRC_1:12;
A7: ( dom (Following s,2) = the carrier of (BitGFA1Str x,y,z) & dom (Following s,3) = the carrier of (BitGFA1Str x,y,z) & dom (Following s1,2) = the carrier of (GFA1AdderStr x,y,z) & dom (Following s2,2) = the carrier of (GFA1CarryStr x,y,z) ) by CIRCUIT1:4;
A8: the carrier of (BitGFA1Str x,y,z) = the carrier of (GFA1AdderStr x,y,z) \/ the carrier of (GFA1CarryStr x,y,z) by CIRCCOMB:def 2;

now

let a be set ; :: thesis: ( a in the carrier of (BitGFA1Str x,y,z) implies (Following s,2) . a = (Following (Following s,2)) . a )
assume a in the carrier of (BitGFA1Str x,y,z) ; :: thesis: (Following s,2) . a = (Following (Following s,2)) . a
then ( a in the carrier of (GFA1AdderStr x,y,z) or a in the carrier of (GFA1CarryStr x,y,z) ) by A8, XBOOLE_0:def 3;
then ( ( (Following s,2) . a = (Following s1,2) . a & (Following s,3) . a = (Following s1,3) . a ) or ( (Following s,2) . a = (Following s2,2) . a & (Following s,3) . a = (Following s2,3) . a ) ) by A3, A4, A5, A7, FUNCT_1:70;
hence (Following s,2) . a = (Following (Following s,2)) . a by A4, A5, FACIRC_1:12; :: thesis: verum

end;

hence Following s,2 = Following (Following s,2) by A6, A7, FUNCT_1:9; :: according to CIRCUIT2:def 6 :: thesis: verum