let ap, bp, cp, dp be non pair set ; :: thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput ap,bp,cp)*>,and2 ] & not cin in InnerVertices (BitGFA0Str ap,bp,cp) holds
for s being State of (BitFTA0Circ ap,bp,cp,dp,cin)
for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds
( (Following s,4) . (GFA0CarryOutput (GFA0AdderOutput ap,bp,cp),cin,dp) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following s,4) . ap = a1 & (Following s,4) . bp = a2 & (Following s,4) . cp = a3 & (Following s,4) . dp = a4 & (Following s,4) . cin = a5 )

let cin be set ; :: thesis: ( cin <> [<*dp,(GFA0AdderOutput ap,bp,cp)*>,and2 ] & not cin in InnerVertices (BitGFA0Str ap,bp,cp) implies for s being State of (BitFTA0Circ ap,bp,cp,dp,cin)
for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds
( (Following s,4) . (GFA0CarryOutput (GFA0AdderOutput ap,bp,cp),cin,dp) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following s,4) . ap = a1 & (Following s,4) . bp = a2 & (Following s,4) . cp = a3 & (Following s,4) . dp = a4 & (Following s,4) . cin = a5 ) )

assume A1: ( cin <> [<*dp,(GFA0AdderOutput ap,bp,cp)*>,and2 ] & not cin in InnerVertices (BitGFA0Str ap,bp,cp) ) ; :: thesis: for s being State of (BitFTA0Circ ap,bp,cp,dp,cin)
for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds
( (Following s,4) . (GFA0CarryOutput (GFA0AdderOutput ap,bp,cp),cin,dp) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following s,4) . ap = a1 & (Following s,4) . bp = a2 & (Following s,4) . cp = a3 & (Following s,4) . dp = a4 & (Following s,4) . cin = a5 )

let s be State of (BitFTA0Circ ap,bp,cp,dp,cin); :: thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds
( (Following s,4) . (GFA0CarryOutput (GFA0AdderOutput ap,bp,cp),cin,dp) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following s,4) . ap = a1 & (Following s,4) . bp = a2 & (Following s,4) . cp = a3 & (Following s,4) . dp = a4 & (Following s,4) . cin = a5 )

set S = BitFTA0Str ap,bp,cp,dp,cin;
set C = BitFTA0Circ ap,bp,cp,dp,cin;
set S1 = BitGFA0Str ap,bp,cp;
set C1 = BitGFA0Circ ap,bp,cp;
set A1 = GFA0AdderOutput ap,bp,cp;
set S2 = BitGFA0Str (GFA0AdderOutput ap,bp,cp),cin,dp;
set C2 = BitGFA0Circ (GFA0AdderOutput ap,bp,cp),cin,dp;
set A2 = GFA0CarryOutput (GFA0AdderOutput ap,bp,cp),cin,dp;
set A1cin = [<*(GFA0AdderOutput ap,bp,cp),cin*>,and2 ];
set cindp = [<*cin,dp*>,and2 ];
set dpA1 = [<*dp,(GFA0AdderOutput ap,bp,cp)*>,and2 ];
let a1, a2, a3, a4, a5 be Element of BOOLEAN ; :: thesis: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin implies ( (Following s,4) . (GFA0CarryOutput (GFA0AdderOutput ap,bp,cp),cin,dp) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following s,4) . ap = a1 & (Following s,4) . bp = a2 & (Following s,4) . cp = a3 & (Following s,4) . dp = a4 & (Following s,4) . cin = a5 ) )
assume A2: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin ) ; :: thesis: ( (Following s,4) . (GFA0CarryOutput (GFA0AdderOutput ap,bp,cp),cin,dp) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following s,4) . ap = a1 & (Following s,4) . bp = a2 & (Following s,4) . cp = a3 & (Following s,4) . dp = a4 & (Following s,4) . cin = a5 )
A3: Following s,(3 + 1) = Following (Following s,3) by FACIRC_1:12;
( (Following s,3) . [<*(GFA0AdderOutput ap,bp,cp),cin*>,and2 ] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following s,3) . [<*cin,dp*>,and2 ] = a5 '&' a4 & (Following s,3) . [<*dp,(GFA0AdderOutput ap,bp,cp)*>,and2 ] = a4 '&' ((a1 'xor' a2) 'xor' a3) ) by A1, A2, LmFTA0S13p;
hence (Following s,4) . (GFA0CarryOutput (GFA0AdderOutput ap,bp,cp),cin,dp) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) by A3, LmFTA0S14p; :: thesis: ( (Following s,4) . ap = a1 & (Following s,4) . bp = a2 & (Following s,4) . cp = a3 & (Following s,4) . dp = a4 & (Following s,4) . cin = a5 )
A4: ( ap in InputVertices (BitFTA0Str ap,bp,cp,dp,cin) & bp in InputVertices (BitFTA0Str ap,bp,cp,dp,cin) & cp in InputVertices (BitFTA0Str ap,bp,cp,dp,cin) & dp in InputVertices (BitFTA0Str ap,bp,cp,dp,cin) & cin in InputVertices (BitFTA0Str ap,bp,cp,dp,cin) ) by A1, ThFTA0S8;
( (Following s,3) . ap = a1 & (Following s,3) . bp = a2 & (Following s,3) . cp = a3 & (Following s,3) . dp = a4 & (Following s,3) . cin = a5 ) by A1, A2, LmFTA0S13p;
hence ( (Following s,4) . ap = a1 & (Following s,4) . bp = a2 & (Following s,4) . cp = a3 & (Following s,4) . dp = a4 & (Following s,4) . cin = a5 ) by A3, A4, CIRCUIT2:def 5; :: thesis: verum