set f1 = and2 ;
set f2 = and2 ;
set f3 = and2 ;
set f0 = xor2 ;
let x, y, z be set ; ( z <> [<*x,y*>,xor2] & x <> [<*y,z*>,and2] & y <> [<*z,x*>,and2] & z <> [<*x,y*>,and2] implies InputVertices (BitGFA0Str (x,y,z)) = {x,y,z} )
assume A1:
( z <> [<*x,y*>,xor2] & x <> [<*y,z*>,and2] & y <> [<*z,x*>,and2] & z <> [<*x,y*>,and2] )
; InputVertices (BitGFA0Str (x,y,z)) = {x,y,z}
set S2 = GFA0CarryStr (x,y,z);
set S1 = GFA0AdderStr (x,y,z);
( InputVertices (GFA0AdderStr (x,y,z)) = {x,y,z} & InputVertices (GFA0CarryStr (x,y,z)) = {x,y,z} )
by A1, Th14, FACIRC_1:57;
hence
InputVertices (BitGFA0Str (x,y,z)) = {x,y,z}
by CIRCCOMB:47, FACIRC_2:21; verum