Full Subtracter Circuit. Part I

Katsumi Wasaki

Shinshu University, Nagano

Noboru Endou

Shinshu University, Nagano

Summary.

We formalize the concept of the full subtracter circuit, define the structures of bit subtract/borrow units for binary operations, and prove the stability of the circuit.

MML Identifier: FSCIRC_1

Contents (PDF format)

1. Bit Subtract and Borrow Circuit
2. Bit Subtracter with Borrow Circuit

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